1. Field of the Invention
The present invention relates to a reconfigurable multiprocessor machine for signal processing.
The invention is primarily applicable to the construction of radioelectric receivers, radiogoniometers, radars or sonars and in a general manner to all devices for signal-processing in which the performance of processing operations calls for high computing power with a high degree of parallelism in the algorithms.
2. Description of the Prior Art
In known multiprocessor machines for signal processing, the computing powers employed depend on the algorithms, on the types of processing operations and on the number of lines of the signal spectrum. At the present time, these powers vary typically from one to a few hundred million operations per second. Depending on the applications which are contemplated, the number of receiving channels of the receivers or of the sensors employed for acquisition of the signals can vary between a few units and a few hundreds of units and the passbands are of greater or lesser widths as a function of the outputs which can amount to several tens of millions of samples per second.
In many applications, the output is continuous and must be processed in real time as the samples arrive, on the one hand because the available memory volume is limited and on the other hand in order to avoid any loss of information.
Moreover, certain applications such as those relating to alarm detections in goniometers impose a short response time between the moment at which the information enters the machine and the moment at which the results are available.
In the majority of applications mentioned above, the greater part of the processing operations performed has a repetitive character in time or in other words the same tasks are repeated at intervals. Some of these processing operations have shorter recurrences than others whereas others have different symmetries.
All these characteristics lead equipment designers to define particular structures which are more or less well-suited to a particular type of processing operation.
Among these structures, there exist those which are designated by the abbreviation MIMD, or "Multiple Instruction Multiple Data" and those known by the abbreviation SIMD, or "Single Instruction Multiple Data". The MIMD structure which makes it possible to carry out different instructions during the same machine cycle is in most general use since all types of problems may thus be dealt with. This structure is constituted by a number of processors having their own sequencers. Each processor is usually dedicated to one type of processing operation and all processing operations performed by all the processors are chained. In consequence, any major modification of the processing chain is liable to involve the entire structural design of the multiprocessor system. Furthermore, if the chain has feedback loops, these latter gives rise to synchronization difficulties which complicate the design development of the logic system.
Moreover, a structure of this type, which is often employed in the so-called "pipeline" mode in which the data pass on a common bus to the processors and are processed successively by the processors, may exhibit a substantial response time.
The SIMD structure, which makes it possible to carry out a single program in simultaneity on each processor on data which are characteristic of each of these latter, is much more homogeneous and uniform but presupposes that the processing operations are also homogeneous and uniform and have various symmetries. One of the major disadvantages results from the fact that the same instruction must be carried out exactly at the same instant in each operator. In consequence, it is impossible to carry out the processing operations, even when they differ very little from each other, on the different components of a vector without substantially reducing the efficiency of the machine.
In regard to data exchanges, an improvement has been made in the SIMD structures with a view to endowing them with the advantages of the MIMD structures and to optimizing the memory occupations but solely in respect of processing operations which have "temporal symmetry". By way of example, a corresponding device is described in French patent Application No. 83 15649.
However, all types of SIMD machines are subject to the disadvantage of having one or a number of bulky and complex sequencing elements which are often difficult to program and are lacking in speed for chaining and synchronization of the tasks to be performed.
In order to make a signal-processing machine more flexible and more adaptable, it would be necessary to ensure not only that it is capable of receiving the different types of processing operation with good efficiency but also that it does not produce any stoppage at the level of the data streams. The machine should therefore be capable of dynamically reconfiguring its data streams, namely both its input streams and those concerned with current tasks.